In recent times, IDC has put forth predictions regarding eight significant trends in the global semiconductor market leading up to 2025. One of the focal points this year is the fan-out panel-level packaging (FOPLP), which has garnered significant interest across various sectorsBut just what is FOPLP, and why has it become a darling of the industry?

The Rise of FOPLP

The increasing popularity of FOPLP can be largely attributed to the influence of another prevailing packaging technology: CoWoS (Chip-on-Wafer-on-Substrate). This technology has become indispensable in the realm of advanced semiconductor packaging.

As a frontrunner in 2.5D/3D packaging technology, CoWoS synergizes neatly with High Bandwidth Memory (HBM) required for AI GPUs

Given the soaring demand for AI chips in the market, CoWoS has transformed from a technology once deemed overly costly into a hot commodityA prime example is NVIDIA, whose chips such as A100, A800, H100, H800, and GH200 heavily rely on TSMC's CoWoS-S packaging technologyMoreover, firms like AMD and Broadcom have also expressed significant interest in CoWoS technology.

However, the surging interest has led to a strain on TSMC's CoWoS packaging capacityWhile AI accelerators have not yet adopted the most advanced processes, they heavily depend on advanced packaging technology, making the ultimate supply of these products contingent on TSMC's capabilities.

Should CoWoS capacity fall short, the efficacy of AI systems would be compromised

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At that point, two paths could be taken.

The first option is to expand CoWoS capacityAccording to reports from TrendForce, TSMC is actively ramping up its CoWoS production capacity to match market demand.

Currently, TSMC’s CoWoS production capacity stands at approximately 35,000 wafers per month, contributing roughly 7% to 9% of total revenueThis capacity is expected to increase to 70,000 wafers monthly by the end of 2025, contributing over 10% of revenueBy the end of 2026, production capacity is projected to further expand to over 90,000 wafers monthlyStatistically speaking, from 2022 to 2026, TSMC’s CoWoS capacity is forecasted to grow at an annual growth rate (CAGR) of about 50%.

Nonetheless, even with these expansions, TSMC's CoWoS capacity still may not fully satisfy the demands of the AI market

TSMC’s Chairman, CCWei, recently indicated, “The demand for advanced CoWoS packaging driven by AI chips remains robustEven with projections to more than double CoWoS capacity by 2024, the demand will continue to outstrip supply, and shortages may likely persist this year."

The second option is to seek out alternative solutionsHerein lies the allure of FOPLP as a proposed answer by the industry.

FOPLP: Transforming Packaging Dynamics

FOPLP actually branches into two primary technologies: fan-out wafer-level packaging (FOWLP) and fan-out panel-level packaging (FOPLP).

While the advantages of fan-out packaging won’t be elaborately discussed here, it suffices to understand that it reduces costs and allows for greater flexibility in design due to fewer constraints on packaging size compared to traditional fan-in packaging

Thus, fan-out packaging has found early adoption in smaller, lower-performance applications.

FOPLP’s technical advantages warrant a brief comparison with FOWLP for clarity.

FOWLP is based on round wafers resembling a discSince the wafers are circular, there is limited usable space near the edges, making optimal utilization more challenging compared to the square shapes of other packaging types, hence restricting the area available for placing chips.

Conversely, FOPLP employs square panels as substrates, which are larger in dimension, akin to using a substantial square board for packaging

This expanded square substrate allows for significantly more chip placements than circular wafers of the same diameter.

Overall, FOPLP boasts substantial advantages in terms of capacity, efficiencies, and cost reductionsIts high area utilization minimizes waste and allows for more chips to be processed in a single packaging cycle, greatly enhancing packaging efficiency while creating a robust economy of scale translating to cost savings.

According to a report from Yole, FOWLP’s area utilization rate sits below 85%, while FOPLP exceeds 95%, permitting a higher number of chip placements and rendering it cheaper than FOWLP; panel-level packaging will offer a 66% cost reduction compared to wafer-level packaging.

In addition, the material selection for FOPLP substrates is more adaptable, allowing for glass or metal substrates

Glass substrates are one of the hot topics among industry giants.

With numerous advantages, FOPLP has already become the focus of major industry players as it gears up for 2024.

NVIDIA and AMD: Embracing FOPLP

According to Wccftech, NVIDIA is interested in incorporating FOPLP packaging technology within its Blackwell architecture chips, potentially applying it to the GB200, with utilization expected to begin in 2025.

Market research firms have noted that NVIDIA's GB200 supply chain is currently in motion, with designs being fine-tuned and tested, projecting shipments to reach approximately 420,000 in 2024, with 1.5 to 2 million units expected this year

Given the ongoing demand-supply imbalance in CoWoS capacity, the introduction of FOPLP packaging technology offers NVIDIA a broader range of choices, somewhat alleviating the pressure from packaging capacity shortages.

Coincidentally, another major player in the AI chip sector, AMD, has also expressed significant enthusiasm for FOPLP technologyAs reported by TrendForce, chip designers like AMD have been actively engaging with TSMC and other professional packaging testing firms since the second quarter of 2024 to explore FOPLP for chip packaging.

Industry Giants Betting Big on FOPLP

At the earnings calls for TSMC, ASE, Powertech, or Innolux throughout 2024, FOPLP will be a predominant topic

TSMC, acting as a leader in advanced packaging, has expressed its belief that this technology could reach maturity in three years.

TSMC: Starting with Smaller Substrates

In August 2024, TSMC announced plans to invest NT$17.14 billion in acquiring the NanKang factory and associated facilities from InnoluxTSMC's CEO, CCWei, publicly stated that the company is accelerating its FOPLP process, with a dedicated R&D team already established and plans underway to set up a small-scale pilot production line, targeting mass production by 2027.

Recently, TSMC injected fresh momentum into its FOPLP technology development

Industry insiders suggest that the company will initially test with panels scaled at 300x300 mm and aims to complete small-scale production line setup by 2026.

During the FOPLP selection process, TSMC weighed various substrate sizes, moving from the initial 515x510 mm to 600x600 mm, before finally opting for the 300x300 mm dimension.

It is important to note that FOPLP technology remains in its early stages and has not yet been scaled for mass productionChallenges such as yield rates, an imperfect supply chain, substrate warping, equipment investment for R&D, standardization, and heat dissipation are hurdles that must be navigated.

After considering holding costs and the maximum size compatible with photomasks, TSMC ultimately decided to proceed with the 300x300 mm panels.

Industry experts analyze that while the 300x300 mm square substrate closely approximates the diameter of 12-inch wafers, it possesses remarkable advantages in space utilization, warping control, and cost

This decision not only lowers the expenses associated with FOPLP packaging but also enhances production efficiency and stability.

ASE Continues Investment

ASE recently announced plans to initiate small-scale shipments of FOPLP products in the second quarter of this yearFollowing expansion efforts in June and early August 2024, ASE has announced a further investment of NT$5.263 billion to purchase facilities from its affiliate Hongjing Construction to bolster advanced packaging capacity.

ASE's COO, Wu Tianyu, stated that the company has been conducting R&D in the FOPLP solutions arena for over five years, closely collaborating with clients, partners, and equipment suppliers

Currently, ASE has expanded the dimensions of its rectangular panels from 300x300 mm to 600x600 mm.

Recent reports from TrendForce indicate that ASE’s first FOPLP orders are anticipated to come from Qualcomm's PMIC and RF products, alongside AMD's PC CPU offerings.

Innolux: Anticipating Mass Production in H1 This Year

In recent years, Innolux, which has invested heavily in FOPLP advanced packaging, announced that its FOPLP technology has achieved process and reliability certifications from front-line customersPreviously, the plan was for mass production of FOPLP technology to commence by the end of 2024; however, Innolux’s Chairman, Hong Jinyang, recently stated that research progress has slightly slowed, as the learning curve takes longer than expected

The company is exploring automotive and other applications, aiming for mass production in the first half of this year.

Powertech: Entering Small-Batch Production

Powertech has been working on FOPLP technology for years, starting the construction of the world's first FOPLP mass production base in Hsinchu Science Park in 2018, officially entering the field of advanced packaging.

Reports indicate that Powertech's fully automated FineLine FOPLP packaging and testing production line in Hsinchu Science Park commenced small-batch production in June 2024. Industry insiders have revealed that Powertech Technology has secured orders for power management IC packaging from MediaTek.

With its early investment in the FOPLP sector, Powertech enjoys a first-mover advantage; furthermore, Samsung had also begun its FOPLP technology development early on.

In 2018, Samsung Electro-Mechanics achieved a new milestone by unveiling an embedded panel-level package (ePLP) PoP technology for the Samsung Galaxy Watch, which features fan-out capabilities

Samsung continues to innovate towards cost-effective, high-density fan-out packaging in an effort to compete with TSMC and Apple’s packaging and front-end businesses.

Last year, the advanced packaging (AVP) business team under Samsung’s DS division began researching the use of FOPLP advanced packaging technology for 2.5D chip packagingThis technology aims to integrate SoCs and HBM onto silicon interposers, effectively transforming them into holistic chips.

Publications presented at international academic conferences have also shown that Samsung is dedicated to developing FOPLP advanced packaging technology to overcome the limitations posed by 2.5D packaging.

Manufacturers from Mainland China are also stepping up efforts, with several companies now capable of production.

Huada Semiconductor, through its subsidiary Jiangsu Pangu Semiconductor Technology Co., has officially initiated a multi-chip high-density panel-level fan-out packaging (FOPLP) industrialization project

By October 2024, Pangu's advanced packaging project is expected to reach significant completion.

Hua Hai Chengke, in recent institutional research engagements, indicated that its QFN products in advanced packaging have already achieved small-batch production and salesIts products aimed at FC, SiP, FOWLP/FOPLP, and other advanced packaging sectors are gradually passing customer assessments, signaling a promising path towards high-end product industrialization.

Entering the FOPLP realm are semiconductor equipment companies as wellIn July 2024, Shoumei Shanghai announced the launch of Ultra C vac-p negative pressure cleaning equipment designed for FOPLP applications, marking its formal entry into the FOPLP advanced packaging market

A major semiconductor manufacturer in China has reportedly placed an order for this cleaning equipment, which arrived at the customer's factory in July.

This cleaning equipment is specifically designed for panels, which can be made of organic or glass materialsThe equipment can manage panels sized 510x515 mm and 600x600 mm, accommodating up to 7 mm warpage.

Apart from the listed public companies, other Chinese firms like China Resources Microelectronics, Yicheng Technology, Ximayi Microelectronics, and the Chinese Academy of Sciences have also developed FOPLP mass production capabilities.

It’s important to note that while FOPLP has the potential to become a leader, it is still not yet fully matured